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publication number s75ws-n_02 revision a amendment 2 issue date october 6, 2005 s75ws-n based mcps stacked multi-chip product (mcp) 256 megabit (16m x 16-bit) cmos 1.8 volt-only simultaneous read/write, burst-mode flash memory with 128 mb (8m x 16-bit) ram type 4 and 512 mb (32m x 16-bit) data flash or 1 gb ornand flash data sheet preliminary notice to readers: this document indicates st ates the current technical specifications regarding the spansi on product(s) described herein. the preliminary status of this document in dicates that a product qualification has been completed, and that initial production has begun. due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications.
ii s75ws-n based mcps s75ws-n_02_a2 october 6, 2005 preliminary notice on data sheet designations spansion llc issues data sheets with advance in formation or preliminary designations to advise readers of product information or intended specif ications throughout the product life cycle, in - cluding development, qualification, initial production, and full production. in all cases, however, readers are encouraged to verify that they have the latest information before finalizing their de - sign. the following descriptions of spansion data sheet designations are presented here to high - light their presence and definitions. advance information the advance information designation indicates that spansion llc is developing one or more spe - cific products, but has not committed any design to production. information presented in a doc - ument with this designation is likely to change , and in some cases, development on the product may discontinue. spansion llc therefore places the following conditions upon advance informa - tion content: ?this document contains information on one or more products under development at spansion llc. the information is intended to help you evaluate this product. do not design in this product without con- tacting the factory. spansion llc reserves the right to change or discontinue work on this proposed product without notice.? preliminary the preliminary designation indicates that the product development has progressed such that a commitment to production has taken place. this designation covers several aspects of the prod - uct life cycle, including product qualification, in itial production, and the su bsequent phases in the manufacturing process that occur before full production is achi eved. changes to the technical specifications presented in a preliminary docume nt should be expected while keeping these as - pects of production under consid eration. spansion places the fo llowing conditions upon prelimi - nary content: ?this document states the current technical specific ations regarding the spansion product(s) described herein. the preliminary status of this document indi cates that product qualification has been completed, and that initial production has begun. due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifica- tions due to changes in technical specifications.? combination some data sheets will contain a combination of pr oducts with different designations (advance in - formation, preliminary, or full pr oduction). this type of document will distinguish these products and their designations wherever necessary, typically on the first page, the ordering information page, and pages with dc charac teristics table and ac erase an d program table (in the table notes). the disclaimer on the first page refe rs the reader to the notice on this page. full production (no desi gnation on document) when a product has been in produc tion for a period of time such th at no changes or only nominal changes are expected, the preliminary designatio n is removed from the data sheet. nominal changes may include those affecting the number of ordering part numbers available, such as the addition or deletion of a speed option, temperature range, package type, or v io range. changes may also include those needed to clarify a descript ion or to correct a typographical error or incor - rect specification. spansion llc applies the follo wing conditions to documents in this category: ?this document states the current technical specific ations regarding the spansion product(s) described herein. spansion llc deems the products to have been in sufficient production volume such that sub- sequent versions of this document are not expected to change. however, typographical or specification corrections, or modifications to the valid combinations offered may occur.? questions regarding these document designations may be directed to your local amd or fujitsu sales office.
publication number s75ws-n_02 revision a amendment 2 issue date october 6, 2005 general description the s75ws-n series is a product line of stacked multi-chip product (mcp) packages and consists of the following items: ? one or more s29ws-n code flash ? ram type 4 ? one or more s29ws-n data flash, or one or more s30ms-p ornand flash the products covered by this document are listed in the table below: distinctive characteristics mcp features ? power supply voltage of 1.7 v to 1.95 v ? high performance ? 54 mhz, 66 mhz, 80 mhz ? packages ?9 x 12 mm 84 ball fbga ? 11 x 13 mm 115 ball fbga ? operating temperature ? wireless, ?25c to +85c s75ws-n based mcps stacked multi-chip product (mcp) 256 megabit (16m x 16-bit) cmos 1.8 volt-only simultaneous read/write, burs t-mode flash memory with 128 mb (8m x 16-bit) ram type 4 and 512 mb (32m x 16-bit) data flash or 1gb ornand flash data sheet preliminary device code flash density ram density nor data flash density ornand data flash density 256 mb 128 mb 256 mb 512 mb 1024 mb s75ws256ndf ?? ? s75ws256neg ?? ?
2 s75ws-n based mcps s75ws-n_02_a2 october 6, 2005 preliminary contents s75ws-n based mcps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i 1 product selector guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 nor flash + psram + ornand flash mcps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 input/output descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 mcp block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 connection diagrams/physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 5.1 special handling instructions for fbga package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2 connection diagram ? nor flash & 1.8 v ram type 4 based pinout, 9 x 12 mm . . . . . . . . . . . . . . . . . . . . . . . 8 5.3 connection diagram ? ornand-based pinout, 11 x 13 mm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.4 physical dimensions ? fea084 ? fine pitc h ball grid array 9 x 12 mm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 5.5 physical dimensions ? fnd115 ? fine pitc h ball grid array 11 x 13 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 mcp revisions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ta b l e s table 2.1 mcp configurations and valid combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 table 2.2 ornand configurations and valid combinations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 table 3.1 nor flash and ram input/output descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3.2 ornand flash input/output descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figures figure 4.1 mcp block diagram 1 .................................................................................................. ....................... 6 figure 4.2 ornand block diagram ................................................................................................. ..................... 7
october 6, 2005 s75ws-n_02_a2 s75ws-n based mcps 3 preliminary 1 product selector guide b note: 0 (protected), 1 (unprotected [default state]) 1.1 nor flash + psram + ornand flash mcps device model numbers mcp configuration code density (mb) ram density (mb) data flash density (mb) flash speed (mhz) psram speed (mhz) dy b power-up state ( see note ) psram (ram type 4) supplier package 84 ball fbga (mm) code flash ram (mb) data storage flash s75ws256ndf lk ws256n 128 2xws256n 256 128 512 54 54 0 49x12 nk 1 lj 66 66 0 nj 1 lh 80 80 0 nh 1 device model numbers nor flash density ornand flash density psram density mcp speed supplier ornand bus width package s75ws256neg uk 512 mb 1024 mb 256 mb 54 mhz 1.8 v psram ty p e 4 x16 11 x 13 x 1.4 mm uj 66 mhz uh 80 mhz sk 54 mhz x8 sj 66 mhz sh 80 mhz
4 s75ws-n based mcps s75ws-n_02_a2 october 6, 2005 preliminary 2 ordering information the ordering part number is formed by a valid combination of the following: package marking note: the bga package marking omits the leading s75 and packing type designator from the ordering part number. valid combinations valid combinations list configurations planned to be supported in volume for this device. consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. s75ws 256 n d f ba w l k 0 packing type 0=tray 2 = 7? tape and reel 3 = 13? tape and reel ram supplier; speed combination k = ram type 4, 54 mhz j = ram type 4, 66 mhz h = ram type 4, 80 mhz package dimensions and ball count; dyb power up; flash device family (data storage) l = 1.4 mm, 9 x 12, 84 ball; 0, ws as data flash n = 1.4 mm, 9 x 12, 84 ball; 1, ws as data flash u = 1.4mm, 11x13, 115-ball, x16 ornand data flash s = 1.4mm, 11x13, 115-ball, x8 ornand data flash temperature range w = wireless (?25c to +85c) package type and material ba = very thin fine-pitch ball grid array (bga), lead (pb)-free compliant package bf = very thin fine-pitch ball grid array (bga), lead (pb)-free package data flash density f = 512 mb g = 1024 mb ram density d = 128 mb e = 256 mb process technology n = 110 nm, mirror bit technology code flash density 256 = 256 mb device family s75ws = multi-chip product (mcp) 1.8-volt burst mode flash memory, ram, and data flash table 2.1 mcp configurations and valid combinations valid combination s75ws256n d f ba, bf w l, n k, h table 2.2 ornand configurations and valid combinations valid combination s75ws256n e g ba, bf w u, s k, j, h
october 6, 2005 s75ws-n_02_a2 s75ws-n based mcps 5 preliminary 3 input/output descriptions table 3.1 identifies the input and output package connections provided on the device. table 3.2 identifies the ornand input and output connections provided on the device. table 3.1 nor flash and ra m input/output descriptions symbol description a max ? a0 address inputs (common) dq15 - dq0 data inputs/outputs oe# output enable input we# write enable input v ss ground nc no connect; not connected internally. rdy ready output. indicates the status of the burst read. (flash) clk clock input. in burst mode, after the initial word is ou tput, subsequent active edges of clk increment the internal address counter. should be at v il or v ih while in asynchronous mode. (common) avd# address valid input. indicates to device that the valid addr ess is present on the address inputs. (flash) f-rst# hardware reset input. f-wp# hardware write protect input. at v il , disables program and erase functions in the four outermost sectors. should be at v ih for all other conditions. f-acc accelerated input. at v hh , accelerates programming; automati cally places device in unlock bypass mode. at v il , disables all program and erase functions. should be at v ih for all other conditions. r-ce# chip-enable input for psram f1-ce# chip-enable input for code flash. asynchronous relative to clk for burst mode. f2-ce# chip-enable input for data flash 1. f2-ce# chip-enable input for data flash 2. r-mrs# control register enable. (psram ? ram type 4 only) f-v cc flash 1.8 volt-only single power supply. r-v cc psram power supply. r-ub# upper byte control. (psram) r-lb# lower byte control . table 3.2 ornand flash input/output descriptions symbol description n-pre ornand power-on read enable. tie to v ss on customer board if not used. n-ale ornand address latch enable n-cle ornand command latch enable n-ce# ornand chip-enable n-wp# ornand write-protect n-we# ornand write-enable n-re# ornand read-enable n-ry/by# ornand ready-busy?this is shared with nor rdy n-i/o0-n-i/o15 ornand i/o signals (i/o0-i/o7 for x8 bus width) n-v cc ornand power supply
6 s75ws-n based mcps s75ws-n_02_a2 october 6, 2005 preliminary 4 mcp block diagram notes: 1. mrs is only present in ram type 4. 2. ce#f1, ce#f2, and ce#f3 are the chip enable pins for the first, second and third flash devi ces, respectively. figure 4.1 mcp block diagram 1 a0-a22 a0-a22 a23 a23 rdy rdy dq0-dq15 cl k clk avd# avd# f1-ce# ce# oe# oe# f-rst# reset# vss vss f-acc acc f1-wp # wp# f-we # we# vcc f-vcc vccq f-vccq a0-a22 wait# clk avd# r-ce# ce# oe# r-lb # lb# r-ub# ub# we# r-mrs# mrs# vss vcc r-vcc vccq r-vccq a0-a22 a23 rdy clk avd# f2-ce# ce# oe# reset# acc fd-wp # wp# we# vss vcc vccq a0-a22 a23 rdy clk avd# f3-ce# ce# oe# reset# acc wp# we# vss vcc vccq dq0-dq15 dq0-dq15 dq0-dq15 dq0-dq15 ws256n flash memory 128mb memory ws256n flash memory ws256n flash memory v
october 6, 2005 s75ws-n_02_a2 s75ws-n based mcps 7 preliminary figure 4.2 ornand block diagram a0-a22 a0-a22 a23 a23 rdy rdy dq0-dq15 clk clk avd# avd# f-ce# ce# oe# oe# f-rst# reset# v ss f-acc acc f1-wp# wp# we# we# v cc f-v cc v ccq a0-a22 wait# clk avd# r1-ce# ce# oe# r-lb# lb# r-ub# ub# we# r-mrs# mrs# r-v cc a0-a22 wait# clk avd# r2-ce# ce# oe# lb# ub# we# mrs# i/o0-i/o15 i/o0-i/o15 n-ry/by# rb# n-cle cle n-ce# ce# n-ale ale n-vss n-re# re# pre n-pre n-wp# wp# n-we# we# n-v cc x16 ms01gp-based mcp dq0-dq15 dq0-dq15 ws256n flash memory 128 mb ram memory ms01gp x16 ornand memory 128 mb ram memory v ss v ss v cc v ccq dq0-dq15 v ss v cc v ccq v ss v cc
8 s75ws-n based mcps s75ws-n_02_a2 october 6, 2005 preliminary 5 connection diagrams/physical dimensions this section contains the i/o designations and package specifications for the s75ws. 5.1 special handling instruc tions for fbga package special handling is required for flash memory products in fbga packages. flash memory devices in fbga packages may be da maged if exposed to ultrasonic cleaning meth- ods. the package and/or data integrity may be compromised if the package body is exposed to temperatures above 150c for prolonged periods of time. 5.2 connection diagram ? nor flash & 1.8 v ram type 4 based pinout, 9 x 12 mm dnu dnu m10 legend: dnu dnu b2 adv# vss b3 b4 clk f-vcc b6 c5 d5 rfu b7 rfu b8 rfu b9 b 9 rfu b5 f1-wp# c2 a7 c3 c3 c 3 c 3 r-lb# c4 we# c6 a8 c7 a11 c8 f2-ce# c9 f-acc a3 d2 a6 d3 r-ub# d4 rfu d6 a19 d7 d7 d 7 d 7 a12 d8 d8 d 8 d 8 a15 d9 d9 d 9 d 9 f-rst# a2 e2 a5 e3 a18 e4 a20 e6 a9 e7 a13 e8 a21 e9 rdy e5 a1 f2 a4 f3 a17 f4 a23 a10 f7 a14 f8 a22 f9 rfu f5 a0 g2 vss g3 dq1 g4 rfu g6 dq6 g7 rfu g8 a16 g9 rfu g5 f1-ce# h2 oe# h3 dq9 h4 dq4 h6 dq13 h7 dq15 h8 r-mrs# h9 dq3 h5 r-ce1# j2 dq0 j3 dq10 j4 r-vcc j6 dq12 j7 dq7 j8 vss j9 f-vcc j5 rfu k2 dq8 k3 dq2 k4 rfu k6 dq5 k7 dq14 k8 fd-wp# k9 dq11 k5 rfu l2 rfu l3 vss l4 f3-ce# l6 rfu l7 f-vccq l8 dnu l9 f-vcc l5 x x x x x x x x x x x x x x x x x x x rfu (reserved for future use) data flash shared only flash 2 data only flash 3 data only flash 1 code only ram only all shared all flash shared only do not use a1 a10 f6 m1
october 6, 2005 s75ws-n_02_a2 s75ws-n based mcps 9 preliminary 5.3 connection diagram ? ornand-based pinout, 11 x 13 mm note: bus 1: nor flash + psram, bus 2: ornand flash legend reserved for future use do not use nor flash only nand flash only psram 1 only psram 2 only psram shared only nor flash & psram shared a1 a2 a9 a10 b1 b2 b9 b10 c3 c2 c9 c10 c5 c4 c7 c6 c8 d3 d2 d9 d10 d5 d4 d7 d6 d8 d1 e3 e2 e9 e10 e5 e4 e7 e6 e8 e1 f3 f2 f9 f10 f5 f4 f7 f6 f8 f1 g3 g2 g9 g10 g5 g4 g7 g6 g8 g1 h3 h2 h9 h10 h5 h4 h7 h6 h8 h1 j3 j2 j9 j10 j5 j4 j7 j6 j8 j1 k3 k2 k9 k10 k5 k4 k7 k6 k8 k1 l3 l2 l9 l10 l5 l4 l7 l6 l8 l1 n2 n9 n10 n1 p2 p9 p10 p1 m3 m2 m9 m10 m5 m4 m7 m6 m8 m1 dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu dnu avd# v ss clk rfu io15 io14 io13 io12 n-ry/by# f-wp# a7 r-lb# f-acc we# a8 a11 io11 io10 n-re# a3 a6 r-ub# f-rst# r2-ce# a19 a12 a15 io9 n-ce# a2 a5 a18 rdy a20 a9 a13 a21 io8 n-v cc a1 a4 a17 rfu a23 a10 a14 a22 n-v cc n-v ss a0 v ss dq1 rfu rfu dq6 rfu a16 n-v ss n-cle# f1-ce# oe# dq9 dq3 dq4 dq13 dq15 r-mrs io7 n-ale# r1-ce# dq0 dq10 f-v cc r-v cc dq12 dq7 v ss io6 n-we# n-wp# dq8 dq2 dq11 rfu dq5 dq14 io4 io5 rfu rfu v ss f-v cc io0 io1 io2 io3 pre
10 s75ws-n based mcps s75ws-n_02_a2 october 6, 2005 preliminary 5.4 physical dimensions ? fea084 ? fine pitch ball grid array 9 x 12 mm 3423 \ 16-038.21a package fea 084 jedec n/a d x e 12.00 mm x 9.00 mm note package symbol min nom max a --- --- 1.40 profile a1 0.10 --- --- ball height a2 1.11 --- 1.26 body thickness d 12.00 bsc. body size e 9.00 bsc. body size d1 8.80 bsc. matrix footprint e1 7.20 bsc. matrix footprint md 12 matrix size d direction me 10 matrix size e direction n 84 ball count ? b 0.35 0.40 0.45 ball diameter ee 0.80 bsc. ball pitch ed 0.80 bsc ball pitch sd / se 0.40 bsc. solder ball placement a2,a3,a4,a5,a6,a7,a8,a9 depopulated solder balls b1,b10,c1,c10,d1,d10 e1,e10,f1,f10,g1,g10 h1,h10,j1,j10,k1,k10,l1,l10 m2,m3,m4,m5,m6,m7,m8,m9 notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jesd 95-1, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9. n/a 10 a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means. c 0.08 0.20 c a e b c 0.15 (2x) c d c 0.15 (2x) index mark 10 6 b top view side view corner 84x a1 a2 a pin a1 ml e1 7 se a d1 ed dc e f g h j k 10 8 9 7 6 4 3 2 1 ee 5 b pin a1 corner 7 sd bottom view 0.15 c a b m c m 0.08
october 6, 2005 s75ws-n_02_a2 s75ws-n based mcps 11 preliminary 5.5 physical dimensions ? fn d115 ? fine pitch ball grid array 11 x 13 mm 3524 \ 16-038.19 \ 10.5.05 package fnd 115 jedec n/a d x e 13.00 mm x 11.00 mm package symbol min nom max note a --- --- 1.40 profile a1 0.17 --- --- ball height a2 0.98 --- 1.15 body thickness d 13.00 bsc. body size e 11.00 bsc. body size d1 10.40 bsc. matrix footprint e1 7.20 bsc. matrix footprint md 14 matrix size d direction me 10 matrix size e direction n 115 ball count b 0.35 0.40 0.45 ball diameter ee 0.80 bsc. ball pitch ed 0.80 bsc ball pitch sd se 0.40 bsc. solder ball placement a3-a8,b3-b8,c1,n3-n8,p3-p8 depopulated solder balls notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jep95, section 4.3, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9. a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means. ? 0.08 c c side view 6 115x a1 0.15 m c mc ab 0.08 b 7 se e1 d1 ed 10 8 7 9 5 4 2 1 3 ee 6 pin a1 corner a dc e f g h j k 7 l m p n 0.20 c bottom view sd b a d e c 0.15 (2x) b 0.15 (2x) top view 9 corner pin a1 a2 a index mark c
12 s75ws-n based mcps s75ws_02_a2 october 6, 2005 advance information 6 mcp revisions revision a0 (february 17, 2005) initial release revision a1 (september 8, 2005) global removed references to the s29rs-n data sheet product selector guide updated table and added 80 mhz options ordering information updated table with new options mcp configurations and valid combinations updated table to reflect new options input/output descriptions updated table and changed some pin names mcp block diagram updated the illustration connection diagram updated the pinout diagram physical dimensions added the fea084 package diagram look-ahead connection diagram removed from data sheet s29ws-n flash module updated to the latest revision revision a2 (october 6, 2005) global added ornand flash information product selector guide added ornand options ordering information updated table with new options mcp block diagram added the ornand illustration connection diagram added the pinout diagram for the ornand device physical dimensions added the fnd115 package diagram
october 6, 2005 s75ws_02_a2 s75ws-n based mcps 13 advance information s29ws-n flash module removed from mcp. available as a standalone document. 1.8 v type 4 psram module removed from mcp. available as a standalone document. colophon the products described in this document are designed, developed and manufactured as contemplated for general use, including wit hout limitation, ordinary industrial use, general office use, personal use, and househol d use, but are not designed, deve loped and manufactured as contem plated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and c ould lead directly to death, personal injury, severe physical damage or other lo ss (i.e., nuclear reaction control in nucle ar facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch co ntrol in weapon system), or (2) for any use where chance of failure is intolerabl e (i.e., submersible repeater and artificial satellite). please note that sp ansion llc will not be liable to you and/or any third party for any claims or damages arising in connection with above- mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporatin g safety design measures into your facility and equipment such as re dundancy, fire protection, and prev ention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on ex- port under the foreign exchange and foreign trade law of japan, the us export administration regulations or the applicable laws of any other country, the prior authorization by the respective government enti ty will be required for export of those products. trademarks and notice the contents of this document are subject to change without notice. this document may contain information on a spansion llc pro duct under development by spansion llc. spansion llc reserves the right to change or discontinue work on any product without notice. the information i n this document is provided as is without warranty or guarantee of any kind as to its ac curacy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty , express, implied, or stat utory. spansion llc assumes no liability for any damages of any kind arising out of the use of the information in this document. copyright ?2005 spansion llc. all rights re served. spansion, the spansion logo, and mi rrorbit are trademarks of spansion llc. o ther company and product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

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